By Topic

An algorithm for diagnostic reasoning using TFPG models in embedded real-time applications

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

1 Author(s)
L. Howard ; Inst. for Software Integrated Syst., Vanderbilt Univ., Nashville, TN, USA

Embedded diagnostic reasoners require compact modeling representations and efficient reasoning algorithms given limited available computational resources. Timed failure propagation graphs (TFPG) are compact representations used to model failure causes and progressions of conditions that are symptoms of failure occurrence, together with the temporality and likelihood of these symptom progressions and the observation of some of the aberrant conditions. Algorithms for design-time diagnosability analysis using TFPG models have previously been reported, but these algorithms have different design objectives leading to different computational strategies and optimization criteria. This paper presents and discusses an algorithm specifically designed for efficient failure isolation based on reported observations of abnormal conditions that is suitable for use in embedded real-time applications

Published in:

AUTOTESTCON Proceedings, 2001. IEEE Systems Readiness Technology Conference

Date of Conference: