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Dynamic voltage scheduling technique for low-power multimedia applications using buffers

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3 Author(s)
Chaeseok Im ; Sch. of Electr. Eng. & Comput. Sci., Seoul Nat. Univ., South Korea ; Huiseok Kim ; Soonhoi Ha

As multimedia applications are used increasingly in many embedded systems, power efficient design for the applications becomes more important than ever. This paper proposes a simple dynamic voltage scheduling technique, which suits the multimedia applications well. The proposed technique fully utilizes the idle intervals with buffers in a variable speed processor. The main theme of this paper is to determine the minimum buffer size to achieve the maximum energy saving in three cases: single-task, multiple subtasks, and multi-task. Experimental results show that the proposed technique is expected to obtain significant power reduction for several real-world multimedia applications

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Low Power Electronics and Design, International Symposium on, 2001.

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