Referenced Items are not available for this document.
A thorough analysis of the physical mechanisms involved in a vertical grounded-base n-p-n bipolar transistor (VGBNPN) under electrostatic discharge (ESD) stress is first carried out by using two-dimensional (2-D) device simulation, transmission line pulse measurement (TLP) and photoemission experiments. This analysis is used to account for the unexpected low value of the VGBNPN snapback holding voltage under TLP stress. A compact model based on a new avalanche formulation resulting from the exact resolution of the ionization integral is therefore proposed
Published in:
Solid-State Circuits, IEEE Journal of
(Volume:36
,
Issue:
9
)
Date of Publication: Sep 2001
- Page(s):
- 1373 - 1381
- ISSN :
- 0018-9200
- INSPEC Accession Number:
- 7039580
- Digital Object Identifier :
- 10.1109/4.944666
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 07 August 2002
- Issue Date :
- Sep 2001
- Sponsored by :
- IEEE Solid-State Circuits Society
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