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CODEF: a system level design space exploration tool

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4 Author(s)
Auguin, M. ; Philips Semicond. Sophia, Valbonne, France ; Capella, L. ; Cuesta, F. ; Gresset, E.

The increasing complexity of embedded applications combined with the advances in chip integration make the design process a very challenging task. Due to this rising complexity, the design under performance, area and consumption constraints of a system-on-a-chip (SOC) composed of mixed software-hardware units, becomes increasingly intricate. This paper presents a method and an associated tool (CODEF) which allow the designer to do an automatic and/or interactive system design space exploration in order to construct cost effective embedded real-time architectures dedicated to complex signal processing applications. The method is based on a recursive partitioning algorithm followed by a communication synthesis procedure

Published in:

Acoustics, Speech, and Signal Processing, 2001. Proceedings. (ICASSP '01). 2001 IEEE International Conference on  (Volume:2 )

Date of Conference:

2001