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Generic scheduling methods for a linear QR array SoC processor

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5 Author(s)
Zhaohui Liu ; Sch. of Electr. & Electron. Eng., Queen''s Univ., Belfast, UK ; Lightbody, G. ; Walke, R. ; Hu, Y.
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A scheduling method for implementing a generic linear QR array processor architecture is presented. This improves on previous work. It also considerably simplifies the derivation of schedules for a folded linear system, where detailed account has to be taken of processor cell latency. The architecture and scheduling derived provide the basis of a generator for the rapid design of System-on-a-Chip (SoC) cores for QR decomposition

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Acoustics, Speech, and Signal Processing, 2001. Proceedings. (ICASSP '01). 2001 IEEE International Conference on  (Volume:2 )

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