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Maximum likelihood carrier phase synchronization in FPGA-based software defined radios

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3 Author(s)
M. Rice ; Brigham Young Univ., Provo, UT, USA ; C. Dick ; F. Harris

Digital signal processing techniques are applied to maximum likelihood carrier phase synchronization for QPSK and QAM in an all-digital sampled data receiver. To achieve the flexibility required by modern software defined radios (SDRs), this task must either be performed in a DSP processor (reconfigurable software) or in an FPGA (reconfigurable hardware). This paper describes the design process for an FPGA-based design and summarizes the FPGA resources required for QPSK carrier phase synchronization

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Acoustics, Speech, and Signal Processing, 2001. Proceedings. (ICASSP '01). 2001 IEEE International Conference on  (Volume:2 )

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