By Topic

Systolic realisation for 2-D convolution using configurable functional method in VLSI parallel array designs

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $31
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Che Wengang ; Dept. of Autom., Tsinghua Univ., Beijing, China ; Li Yanda ; Jiao Yue

Besides introduction to the configurable functional method (CFM) proposed by the first author, which achieves high configurability to match various application aspects, a new realisation of 2-D convolution is presented using the CFM. It has the advantage of CFM arrays whose PEs and array are configurable. In systolic realisation of 2-D convolution with window size on a mesh-connected 2-D CFM array, the input data are permitted to be scanned row-wise and obtained from array boundaries. In addition to the 2-D CFM array, shift registers are used for storing the input data, in a real time processing system with video rate. Because of the configurability of the proposed 2-D systolic array, this architecture is also useable in other applications, such as matrix vector (or matrix) multiplication.

Published in:

Computers and Digital Techniques, IEE Proceedings E  (Volume:138 ,  Issue: 5 )