Design and testing of easily testable PLA

A technique for designing and testing of an easily testable programmable logic array (PLA) is proposed in which the test vectors are derivable directly from the personality matrix of the PLA by simple algorithms. This technique requires few test vectors for testing. The test evaluation is simple, because in the fault-free condition, the output patterns for some of the test vectors are the same as those in the personality matrix of the PLA and are all 0s for the rest of the test vectors. The PLA is augmented with an extra shift register. It has negligible, if any, effect on the speed of the PLA in normal mode of operation as no extra hardware is added to the input output paths. High fault coverage is obtained in the proposed technique. All single and multiple stuck-at faults, all single and multiple crosspoint faults, and most of the bridging faults and their combinations are detected. The testing technique, however, is function dependent.