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Reconfigurable fault tolerant networks for fast packet switching

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2 Author(s)
S. -C. Yang ; Dept. of Electr. Eng.-Syst., Univ. of Southern California, Los Angeles, CA, USA ; J. A. Silvester

The authors consider the design and analysis of reconfigurable networks for fast packet switching. The design constraints resulting from the use of fast packet switching that affect fault-tolerant network design are carefully studied. A reconfigurable network with high link redundancy is then proposed. An abstract replacement model that characterizes the proposed reconfigurable network is presented. Network fault tolerance problems are transformed into well known assignment problems. Two practical designs based on feasible technology are presented. An appreciable reliability improvements is achieved and full bandwidth is maintained up to a tolerable level of failures, with relatively few spare switches

Published in:

IEEE Transactions on Reliability  (Volume:40 ,  Issue: 4 )