Referenced Items are not available for this document.
There is an inherent redundancy in multirate algorithms, such as multilevel wavelet analysis, employing conventional FIR filter banks as the computational elements. Here, a novel application of asynchronous control techniques to reduce this redundancy in the VLSI implementation of such algorithms is presented, and an architecture for the Haar discrete wavelet transform is introduced that has improved latency and throughput characteristics, when compared with an equivalent synchronous design
Published in:
Electronics Letters
(Volume:37
,
Issue:
15
)
Date of Publication: 19 Jul 2001
- Page(s):
- 983 - 984
- ISSN :
- 0013-5194
- INSPEC Accession Number:
- 7007708
- Digital Object Identifier :
- 10.1049/el:20010639
- Date of Current Version :
- 07 August 2002
- Issue Date :
- 19 Jul 2001
- Sponsored by :
- Institution of Engineering and Technology
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