By Topic

A nonlinear capacitance cancellation technique and its application to a CMOS class AB power amplifier

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Chengzhou Wang ; Center for Wireless Commun., California Univ., San Diego, La Jolla, CA, USA ; Larson, L.E. ; Asbeck, P.M.

A nonlinear cancellation technique is developed specifically for MOS class AB power amplifiers. This technique utilizes a PMOS transistor at the amplifier input to cancel the variation of the input capacitance, thus improving the overall amplifier linearity. A monolithic CMOS RF power amplifier with this technique is designed and fabricated in a standard 0.6 /spl mu/m CMOS technology. The prototype single-stage amplifier has a measured drain efficiency of 40% and a power gain of 7 dB at 1.9 GHz. Linearity measurements show that the new amplifier has over 10 dB of IM/sub 3/ improvement and 6 dB of ACPR improvement compared with the traditional NMOS class AB power amplifier.

Published in:

Radio Frequency Integrated Circuits (RFIC) Symposium, 2001. Digest of Papers. 2001 IEEE

Date of Conference:

20-22 May 2001