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A multi-gate dielectric technology using hydrogen pre-treatment has been developed for 100-nm generation CMOS technologies. This process can remove the chemical oxide layer and smoothes the Si surface before gate-oxidation to improve interface carrier mobility as well as reliability of 1.3 nm ultra-thin gate dielectric film. In multi-oxide processing, the hydrogen pretreatment does not affect the performance or yield in the thick gate region (1.6-3.4 nm). Using this technology, we have achieved I/sub D//sup sat/ of 780 /spl mu/A//spl mu/m (I/sub OFF/=25 nA//spl mu/m) and 305 /spl mu/A//spl mu/m (I/sub OFF/=30 nA//spl mu/m) for 70-nm nMOS and pMOS, respectively, with 1.3 nm gate dielectric at 1.0 V operation. In addition to the performance improvement, the reliability in terms of TDDB and NBTI (negative bias temperature instability) were also improved.