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A 12-bit mismatch-shaped pipeline A/D converter

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2 Author(s)
Shabra, A. ; MIT, Cambridge, MA, USA ; Hae-Seung Lee

This paper presents pipeline A/D converters with improved linearity. The linearity improvement is achieved through a combination of oversampling and mismatch shaping, which modulates the distortion energy out-of-band. A 77 dB SFDR is achieved at an oversampling ratio of 4 and a sampling rate of 51 Msample/s, which is a 12 dB improvement compared to a converter with no mismatch shaping. These results were obtained from a test chip fabricated in a 0.35 /spl mu/m CMOS process.

Published in:

VLSI Circuits, 2001. Digest of Technical Papers. 2001 Symposium on

Date of Conference:

14-16 June 2001