Skip to Main Content
This paper describes a PMOS-boosted source follower bus driver technique for robust, full-swing, on-chip buses. A 10% performance improvement on a 128-bit L1 cache bus is achieved on a 0.18 /spl mu/m production 64-bit processor. A regional clock grid driver scheme with 14% energy reduction is also described.
Date of Conference: 14-16 June 2001