Referenced Items are not available for this document.
This paper describes the realization of a dynamically reconfigurable logic LSI based on a novel parallel computer architecture. The key point of the architecture is its dual-structured cell array to enable dynamic and autonomous reconfiguration of the logic circuit. The LSI was completed with successful introduction of two specific features: fully asynchronous logic circuits and homogeneous structure using only LUTs.
Published in:
VLSI Circuits, 2001. Digest of Technical Papers. 2001 Symposium on
Date of Conference: 14-16 June 2001
- Page(s):
- 103 - 106
- Meeting Date :
- 14 Jun 2001-16 Jun 2001
- Print ISBN:
- 4-89114-014-3
- INSPEC Accession Number:
- 7092032
- Conference Location :
- Kyoto, Japan
- Digital Object Identifier :
- 10.1109/VLSIC.2001.934208
- Product Type:
- Conference Publications
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