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Autonomous decentralized low-power system LSI using self-instructing predictive shutdown method

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3 Author(s)
Shimizu, T. ; Central Res. Lab., Hitachi Ltd., Tokyo, Japan ; Arakawa, F. ; Kawahara, T.

There is a strong demand from the mobile telecommunications industry for LSIs that achieve higher performance using less power. However, it is almost impossible in a short design period for a circuit designer to carry out an optimal design with both the power and performance items of a LSI having tens of millions of logic gates. Furthermore, a considerable component of the DC-leakage current originates from the subthreshold, gate leakage, and junction leakage currents of the MOS transistor even when the LSI is in an active state. This paper proposes an autonomous decentralized system LSI where each block has a predictive shutdown function using an MOS power switch controlled by a method based on self-instruction.

Published in:

VLSI Circuits, 2001. Digest of Technical Papers. 2001 Symposium on

Date of Conference:

14-16 June 2001