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Phase assignment for synthesis of low-power domino circuits

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3 Author(s)
Patra, P. ; Strategic Cad Labs., Intel Corp., USA ; Narayanan, U. ; Kim, T.

High performance circuit techniques such as domino logic have migrated from the microprocessor world into more mainstream ASIC designs but domino logic comes at a heavy cost in terms of total power dissipation. A set of results related to automated phase assignment for the synthesis of low-power domino circuits is presented: (1) it is demonstrated that the choice of phase assignment at the primary outputs of a circuit can significantly impact lower dissipation in the domino block, and (2) a method to determine a phase assignment that minimises power consumption in the final circuit implementation is proposed. Preliminary experimental results on a mixture of public domain benchmarks and real industry circuits show potential power savings as high as 34% over the minimum area realisation of the logic. Furthermore, the low-power synthesised circuits still meet timing constraints

Published in:

Electronics Letters  (Volume:37 ,  Issue: 13 )

Date of Publication:

21 Jun 2001

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