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Summary form only given, as follows. CMP aims at providing Universities, Research Laboratories and industries with the possibility to have their integrated circuits projects fabricated for prototyping and low volume production. Presently, users are serviced for CMOS double layer poly/double layer metal (DLP/DLM) 0.8μ, DLM/TLM 0.6 μ, DLP/4LM 0.35 μ, SLP/6LM 0.25 μ, SLP/6LM 0.18 μ, BiCMOS DLP/DLM 0.8 μ, SiGe HBT 0.8 μ DLP/DLM, SiGe HBT 0.35 μ SLP/5LM and GaAs HEMT 0.2 μ. About 40 multi-project runs are offered per year. Micro Electro Mechanical Systems (MEMS) are also provided in standard CMP runs in CMOS DLP/DLM 0.8 μ 0.6 μ, BiCMOS DLP/DLM 0.8 μ and HEMT GaAs 0.2 μ, using compatible front-side bulk micro-machining. MUMPS process is offered as a surface micromachining allowing one to integrate MEMS only microstructures. Finally, the main processes for Multi-Chip Modules (MCMs) are also accessible through CMP. CMP has introduced very advanced processes during the 3 last years : 0.25 μm CMOS in 1997, 0.18 μm CMOS in 1999, 0.5 μm Silicon On Sapphire in 2000, and the 0.35 μm HBT BiCMOS in 2001. Those processes represent a challenge for CAD design, applications, and training. We will present the process and design-kits features for those advanced technologies, and give some results on the dissemination and support activity at CMP. Accessing advanced and state of the art processes gives to the academic/research community a high quality of engineering education and a high quality of research.