By Topic

Yield analysis and process modeling of low cost, high throughput flip chip assembly based on no-flow underfill materials

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Thorpe, R. ; George W. Woodruff Sch. of Mech. Eng., Georgia Inst. of Technol., Atlanta, GA, USA ; Baldwin, D.F. ; Smith, B. ; McGovern, L.

As a concept to achieve low-cost, high-throughput flip chip on board (FCOB) assembly, a new process has been developed implementing next generation flip chip processing based no-flow fluxing underfill materials. The low-cost, high throughput flip chip process implements large area underfill printing, integrated chip placement and underfill flow and simultaneous solder interconnect reflow and underfill cure. The goals of this study are to demonstrate feasibility of no flow underfill materials and the high throughput flip chip process over a range of flip chip configurations, identify the critical process variables affecting yield, analyze the yield of the high throughput flip chip process, and determine the impact of no-flow underfill materials on key process elements. Reported in this work is the assembly of a series of test vehicles to assess process yield and process defects. The test vehicles are assembled by depositing a controlled mass of underfill material on the chip site, aligning chip to the substrate pads, and placing the chip inducing a compression type underfill flow. The assemblies are reflowed in a commercial reflow furnace in an air atmosphere to simultaneously form the solder interconnects and cure the underfill. A series of designed experiments identify the critical process variables including underfill mass, reflow profile, placement velocity, placement force, and underfill material system. Of particular interest is the fact that the no-flow underfill materials studied exhibit an affinity for unique reflow profiles to minimize process defects

Published in:

Electronics Packaging Manufacturing, IEEE Transactions on  (Volume:24 ,  Issue: 2 )