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On the speedup required for a multicast parallel packet switch

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2 Author(s)
Iyer, S. ; Comput. Syst. Lab., Stanford Univ., CA, USA ; McKeown, N.

A parallel packet switch (PPS) is a switch in which the memories run slower than the line rate. Arriving packets are load-balanced packet-by-packet over multiple lower speed center stage packet switches. It is known that, for unicast traffic, a PPS can precisely emulate a FCFS output-queued (OQ) switch with a speedup of two and an OQ switch with delay guarantees with a speedup of three. In this paper we ask: is it possible for a PPS to emulate the behavior of an OQ multicast switch? The main result is that for multicast traffic an N-port PPS can precisely emulate a FIFO OQ switch with a speedup of S>2/spl radic/N+1, and a switch that provides delay guarantees with a speedup of S>2/spl radic/(2N)+2.

Published in:

Communications Letters, IEEE  (Volume:5 ,  Issue: 6 )

Date of Publication:

June 2001

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