Process and electrical (modulator) efficiency of plasma immersion ion implantation

Plasma immersion ion implantation (PIII) has been shown to be an effective surface modification technique. In PIII processes, the implantation voltage has a large impact on the process and electrical (modulator) efficiency. For experiments in which the sample temperature is raised to a constant value by ion bombardment only - without external heating - our simulation studies reveal that the low-voltage mode featuring a higher ion current density gives rise to a higher electrical efficiency with regard to both single- and batch-processing. The low-voltage mode also produces a thinner plasma sheath and lower energy loss to the passive resistor. The hardware capacitance is responsible for the reduction in the electrical efficiency. For PIII experiments conducted under typical conditions, e.g., plasma density of 5.0/spl times/10/sup 9/ cm/sup -3/, implanted area of 0.08 m/sup 2/, and employing a 10 k/spl Omega/ pull-down resistor for operations between 1 kV and 100 kV, the efficiency of the power modulator is quite low and generally less than 50% exclusive of the inefficiency stemming from secondary electrons. Our results demonstrate that the low-voltage, small pulse-duration operating mode has higher implantation efficiency compared to conventional high-voltage PIII. This can be attributed to the higher effective implantation efficiency /spl eta//sub e/ resulting from the smaller secondary electron coefficient at a lower voltage and higher electrical efficiency /spl eta//sub p/, in the low-voltage, short-pulsewidth operating mode. Our work suggests that both the total implantation efficiency /spl eta//sub total/ and modification efficacy can be improved by elevated-temperature, high-frequency, low-voltage PIII.