Forms of algorithms that facilitate rapid processing on affiliated systolic arrays are examined. Classes of linear maps A: E n→En that can be computed on p×p arrays at speed. O(p) where p=√n are identified. The array architectures which provide the requisite computational support are proposed. The expansion of arbitrary linear maps in terms of the fast maps is considered. The results include a definitive method for minimal expansions and for best approximations of an a priori order. A detailed comparative example which illustrates the principles in question is also included
Published in:
Circuits and Systems, IEEE Transactions on
(Volume:36
,
Issue:
4
)
Date of Publication:
Apr 1989
- Page(s):
-
553
-
560
- ISSN :
-
0098-4094
- INSPEC Accession Number:
-
3421273
- Digital Object Identifier :
-
10.1109/31.92887
- Product Type:
-
Journals & Magazines
- Date of Current Version :
-
06 August 2002
- Issue Date :
-
Apr 1989