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Hole trapping and trap generation in the gate silicon dioxide

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4 Author(s)
J. F. Zhang ; Sch. of Eng., Liverpool John Moore Univ., UK ; H. K. Sii ; G. Groeseneken ; R. Degraeve

Oxide breakdown has been proposed to be a limiting factor for future generation CMOS. The breakdown is caused by defect generation in the oxide. Although electron trap generation has received much attention, there is little information available on the hole trap generation. The relatively high potential barrier for holes at the oxide/Si interface makes it difficult to achieve a high level of hole injection. Most previous work was limited to an injection level Qinj of 1014 cm-2. In this paper, we investigate the hole trapping and trap generation when Qinj reaches the order of 1018 cm-2. When Qinj <1015 cm-2, the trapping is dominated by the as-grown traps. As Qinj increases further, however, it is found that the generation of new traps controls the trapping. The trap generation does not saturate up to the oxide breakdown. The trapping kinetics for both the as-grown and the generated traps is studied. The relationship between the density of generated traps and the Qinj is explored. Attention is paid to how the trapping and trap generation depends on the distance from the interface. In contrast to the uniform generation of electron traps across the oxide, we found that the hole trap generation was not uniform and it moved away from the interface as Qinj increased

Published in:

IEEE Transactions on Electron Devices  (Volume:48 ,  Issue: 6 )