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The impact of interconnection and dielectric materials on the time delay of scaled memory-adder systems

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3 Author(s)
Nikolic, K. ; Dept. of Phys. & Astron., Univ. Coll. London, UK ; Berzon, D. ; Forshaw, M.

This paper examines how the use of copper instead of aluminum and the use of low dielectric constant material instead of standard oxide materials for chip wiring would improve the signal delay in a typical microprocessor. The minimum feature size (MOSFET gate length) of basic elements, MOSFETs and interconnects, is scaled in the range of 550 nm-50 nm. Our results suggest that, for example, a 50% decrease of the interconnect resistance will bring only a very moderate improvement (up to a few percent), whereas the reduction of dielectric constant by 50% would have a very strong impact of almost 50% reduction in the time delay for the local line structures

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Electron Devices, IEEE Transactions on  (Volume:48 ,  Issue: 6 )