A high gain n-well/gate tied PMOSFET image sensor fabricated from a standard CMOS process

The performance of a high gain photodetector fabricated using a standard 0.8-/spl mu/m, triple metal, n-well CMOS process is reported, The photodetector is formed by connecting the gate of the PMOSFET and n-well together while keeping both floating. The depletion region induced by the floating gate and the well-to-substrate p-n junction separate the optically generated electron-hole pairs in the direction perpendicular to the current flow. The n-well potential modulated by illumination is fed back to the gate through the well-to-gate connection, which results in an extra current amplification beyond that of a normal PMOSFET biased in the lateral bipolar mode. A high responsivity of 2.5/spl times/10/sup 3/ A/W has been measured with an operating voltage as low as 0.3 V for a W/L of 8.2 /spl mu/m/0.8 /spl mu/m. The impact of technology scaling on the performance of the photodetector are also studied. A simple 32/spl times/32-pixel image sensor array was fabricated to demonstrate the feasibility of integrating the new device in actual circuit applications.