By Topic

A flash memory technology with quasi-virtual ground array for low-cost embedded applications

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

10 Author(s)

In this paper, the 0.35-μm implementation of a 1-Mb embedded flash memory circuit, based on a split-gate concept, is presented. This concept provides an excellent solution for embedded applications, thanks to the very limited number of processing steps that are needed on top of a baseline CMOS process. Nevertheless, a high performance memory cell is obtained that operates with moderate voltages only. Furthermore, the source-side injection (SSI) mechanism used for cell programming exhibits a very narrow threshold voltage (Vt) distribution, which is maintained even after 1 million program/erase cycles. Because of this tight distribution and the inherent overerase immunity, no additional verification circuitry is needed, which greatly simplifies the decoder design and minimizes the memory footprint. Finally, the memory cell is placed in a quasi-virtual ground array (QVGA) configuration, resulting in a compact memory area with only three quarters of a contact per cell, whereas most arrays require at least a full contact per cell or more

Published in:

IEEE Journal of Solid-State Circuits  (Volume:36 ,  Issue: 6 )