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Fast IP table lookup and memory reduction

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2 Author(s)
Liu, Y.-C. ; Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., China ; Lea, C.-T.

One of the time-consuming tasks in IP4 packet processing is maximum sequence matching. Fast routing requires tens of millions of routing lookups to be performed in one second. This paper describes an implementation of IP table lookup. The implementation is intended as part of the cord of an OC-192 (10 Gbps) and OC-768 (40 Gbps) rate packet processor. One key element is a memory reduction technique that applies to all lookup algorithms. For algorithms with similar complexity as the one described in the paper, the improvement in terms of memory reduction is about 20%-30%

Published in:

High Performance Switching and Routing, 2001 IEEE Workshop on

Date of Conference:

2001