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Novel spectral methods for built-in self-test in a system-on-a-chip environment

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4 Author(s)
A. Giani ; Intel Corp., Hillsboro, OR, USA ; Shuo Sheng ; M. S. Hsiao ; V. D. Agrawal

This new method of built-in self-test (BIST) for sequential cores on a system-on-a-chip (SOC) generates test patterns using a real-time program that runs on an embedded processor. Alternatively, the same program can be run on an external low-cost tester. This program generates patterns using circuit-specific spectral information in the form of one or more Hadamard coefficients. The coefficients are extracted from high fault-coverage compacted pattern sets. When an embedded processor is available on SOC, the overhead is negligible. Also, sequential cores are tested in the functional mode, avoiding activation of nonfunctional timing paths. We present experimental results to show that for hard to test circuits, with any given test time, spectral patterns provide significantly higher fault coverage than weighted-random patterns

Published in:

VLSI Test Symposium, 19th IEEE Proceedings on. VTS 2001

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