Notification:
We are currently experiencing intermittent issues impacting performance. We apologize for the inconvenience.
By Topic

A fast and low-power distance computation unit dedicated to neural networks, based on redundant arithmetic

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Dumonteix, Y. ; ASIM Lab., Paris VI Univ., France ; Bajot, Y. ; Mehrez, H.

This paper presents the design of a fast and low power consumption distance computation unit : Σi(Ai-Bi )2. It is dedicated to the digital RBF neural network implementation. The proposed architecture is composed of two parts. The first computes the distance (Ai-Bi)2, and the second performs the sum of these distances. It is based on an efficient squarer in redundant arithmetic. Thank to this operator, the distance measure circuits developed offer better performances than those based on classical arithmetic. The average gain is equal to 11% in delay and 18% in power consumption

Published in:

Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on  (Volume:4 )

Date of Conference:

6-9 May 2001