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Evolutionary graph generation system with transmigration capability for arithmetic circuit design

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3 Author(s)
Homma, N. ; Graduate Sch. of Inf. Sci., Tohoku Univ., Sendai, Japan ; Aoki, T. ; Higuchi, T.

This paper presents a novel graph-based evolutionary optimization technique called Evolutionary Graph Generation (EGG), and its application to the design of fast constant-coefficient multipliers using parallel counter-tree architecture. This paper also demonstrates that the evolution process of EGG can be accelerated by a simple operation, called “transmigration”, which is to import previously generated good solutions for creating the other solutions

Published in:

Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on  (Volume:5 )

Date of Conference:

2001

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