On the use of don't cares during symbolic reachability analysis

We present a new symbolic algorithm for reachability analysis in sequential circuits. Using don't cares from the computed reachable states, we introduce flexibility in choosing the transition relation, which can be used to minimize its Binary Decision Diagram (BDD). This can reduce the time-consuming image computation step. The technique is implemented and integrated in our equivalence checking system M-CHECK and its efficiency is shown on the ISCAS-89 benchmark circuits.