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A low-power gigabit Ethernet analog equalizer

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2 Author(s)
Amini, P. ; Dept. of Electr. & Comput. Eng., Tehran Univ., Iran ; Shoaei, O.

An analog continuous time digitally adaptive cable equalizer for gigabit Ethernet has been designed in a 0.35 μm CMOS process with a single 3 V supply. A three-stage opamp-based filter has been used while each stage has one pole and one zero consuming less than 3.8 mW. Each stage is able to amplify high frequency signals up to 11 dB

Published in:

Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on  (Volume:1 )

Date of Conference:

6-9 May 2001