Referenced Items are not available for this document.
Hysteresis neural network is applied to combinatorial optimization problems and efficiency of its parallel computing is obtained by numerical calculations. In this research, we implement hardware optimization problems solver by hysteresis neural networks. To produce hysteresis neural module, we propose a novel synapse architecture. From experimental results, we confirm the efficiency of implementation
Published in:
Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on
(Volume:3
)
Date of Conference: 6-9 May 2001
- Page(s):
- 565 - 568 vol. 2
- Meeting Date :
- 06 May 2001-09 May 2001
- Print ISBN:
- 0-7803-6685-9
- INSPEC Accession Number:
- 6999157
- Conference Location :
- Sydney, NSW
- Digital Object Identifier :
- 10.1109/ISCAS.2001.921373
- Product Type:
- Conference Publications
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