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Hybrid dynamic/quadratic programming algorithm for interconnect tree optimization

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2 Author(s)
Yu-Yen Mo ; Dept. of Electr. & Comput. Eng., Iowa State Univ., Ames, IA, USA ; Chu, C.

We present an algorithm for delay minimization of interconnect trees by simultaneous buffer insertion/sizing and wire sizing in this paper. Both wire widths and buffer sizes are chosen from user-defined discrete sets. Our algorithm integrates the quadratic programming approach for handling a wire branch into the dynamic programming (DP) framework. Our experimental results show that our hybrid dynamic/quadratic programming algorithm is faster, more accurate, and uses considerably less memory than the pure DP approach

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Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on  (Volume:20 ,  Issue: 5 )