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Analog switched capacitor memory devices are suitable for use in a wide range of applications where analog waveforms and signals must be captured or delayed. A switched-capacitor analog memory circuit intended for use in high-speed, low-power data acquisition systems operating at frequencies up to 700 MHz is described. A two-channel version of the circuit with 32 memory cells for each channel has been integrated in a 2 /spl mu/m CMOS technology with poly-poly capacitors. One memory channel dissipates 0.9 mW while operating from a single +5 V supply.