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A novel ASIC design approach based on a new machine paradigm

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5 Author(s)
R. W. Hartenstein ; F. B. Inf., Kaiserslautern Univ., Germany ; A. G. Hirschbiel ; M. Riedmuller ; K. Schmidt
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A novel design methodology for rapid implementation of cheap high-performance ASICs (application-specific integrated circuits) is introduced. The method derives from high-level algorithm specifications or from high-level source programs not only the target hardware, but (in contrast to silicon compilers) also the machine code to run it. The method is based on a novel sequential machine paradigm where execution is used (being orders of magnitude more efficient) instead of simulation and where programmers may do the design job, rather than real hardware designers. It is shown that, for a very large class of commercially important algorithms (DSP, graphics, image processing and many others), this paradigm is orders of magnitude more efficient that the von Neumann paradigm. Compared to von-Neumann-based implementations, acceleration factors of up to more than 2000 have been obtained experimentally. The performance of ASICs obtained by this methodology is mostly competitive with ASIC designs obtained in the much slower and much more expensive traditional way. As a by-product the new methodology also supports the automatic generation of universal accelerators for coprocessor use in workstations

Published in:

IEEE Journal of Solid-State Circuits  (Volume:26 ,  Issue: 7 )