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A single-chip 2.4-GHz direct-conversion CMOS receiver for wireless local loop using multiphase reduced frequency conversion technique

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7 Author(s)
Kyeongho Lee ; Global Commun. Technol., Santa Clara, CA, USA ; Joonbae Park ; Jeong-Woo Lee ; Seung-Wook Lee
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A single-chip direct-conversion CMOS receiver for 2.4-GHz wide-band code-division multiple-access wireless local loop (WLL) is described. The chip includes a low noise amplifier, a 12-phase downconverter, a variable gain amplifier, a gm-C channel selection filter, a programmable phase-locked loop for seven channel frequencies, and a 4-bit flash analog-to-digital converter. The proposed multiphase reduced frequency conversion scheme combined with a multiphase sampling fractional-N prescaler, a cascaded dc-offset canceler and distributed automatic gain control loops offers solutions to problems of a direct-conversion receiver. Experimental results show -115-dBm sensitivity, 4.4-dB noise figure, and 95-dB dynamic range, which sufficiently meet commercial WLL specification

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Solid-State Circuits, IEEE Journal of  (Volume:36 ,  Issue: 5 )