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Bipolar transistor selected P-channel flash memory cell technology

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3 Author(s)
Ohnakado, T. ; Advanced Technol. Res. & Dev. Centre, Mitsubishi Electr. Corp., Hyogo, Japan ; Ajika, N. ; Satoh, Shin-ichi

A novel BIpolar Transistor Selected (BITS) P-channel flash memory cell is proposed, where a bipolar transistor embedded in the source region of the cell amplifies cell-read-current and acts as a select transistor. With this cell, not only a very low 1.5 V non-word-line-boosting read operation, but also a sector-erase operation are successfully achieved with only a small cell-size increase over the conventional NOR cell. Moreover, this cell technology maintains all the advantages of the P-channel DIvided-bit-line NOR (DINOR) flash memory

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Electron Devices, IEEE Transactions on  (Volume:48 ,  Issue: 5 )