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Design issues for high-performance active routers

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2 Author(s)
Wolf, T. ; Dept. of Comput. Sci., Washington Univ., St. Louis, MO, USA ; Turner, J.S.

Modern networks require the flexibility to support new protocols and network services without changes in the underlying hardware. Routers with general-purpose processors can perform data path packet processing using software that is dynamically distributed. However, custom processing of packets at link speeds requires immense computational power. This paper proposes a design of a scalable, high-performance active router. Multiple network processors with cache and memory on a single application specific integrated circuit are used to overcome the limitations of traditional single processor systems. The proposed design is used as a vehicle for studying the key issues that must be resolved to allow active networking to become a mainstream technology. Benchmark measurements are used to put the design in relation to actual application demands

Published in:

Selected Areas in Communications, IEEE Journal on  (Volume:19 ,  Issue: 3 )