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Low-voltage CMOS pulsewidth control loop using push-pull charge pump

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2 Author(s)
Wang, J.S. ; Dept. of Electr. Eng., Nat. Chung Cheng Univ., Chiayi, Taiwan ; Yang, P.H.

The push-pull charge pump circuit has found new applications in pulsewidth control loops (PWCLs) for clock buffers. With this charge pump, the supply voltage of the PWCL can be reduced to at least 1.8 V when a 0.35 μm CMOS process is used for a 600 MHz incoming clock signal

Published in:

Electronics Letters  (Volume:37 ,  Issue: 7 )

Date of Publication:

29 Mar 2001

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