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On routing structure for the hybrid field programmable architecture

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3 Author(s)
Nadjarbashi, M. ; Dept. of Electr. & Comput. Eng., Tehran Univ., Iran ; Fakhraie, S.M. ; Kaviani, A.

In this paper, we investigate the routing architecture for an FPGA with hybrid clusters comprising both look-up tables (LUTs) and PLA-like blocks. We discuss the CAD flow that is used to place and route a number of MCNC benchmark circuits. Our experimental results show the optimized values for cluster-level parameters as well as the best cluster size in terms of area and performance

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Microelectronics, 2000. ICM 2000. Proceedings of the 12th International Conference on

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