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A framework for fast hardware-software co-simulation

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3 Author(s)
Hoffmann, A. ; Integrated Signal Process. Syst., Tech. Hochschule Aachen, Germany ; Kogel, T. ; Meyr, H.

We present a new hardware-software co-simulation framework enabling fast prototyping in system-on-chip designs. On the software side, the machine description language LISA allows the generation of bit-true models of programmable architectures on various levels-from instruction-set to phase accuracy. Based on these models, a complete tool-suite consisting of fast compiled processor simulator assembler, linker HLL-compiler as well as co-simulation interface can be generated automatically. On the hardware side, the SystemC simulation class library is employed and enhanced with our generic co-simulation interface that enables the coupling of hardware and software models specified at various levels of abstraction. Besides that, a hardware modeling strategy using abstract macro-cycle based C++ processes to increase hardware modeling efficiency and simulation speed is presented

Published in:

Design, Automation and Test in Europe, 2001. Conference and Exhibition 2001. Proceedings

Date of Conference:

2001