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A design strategy for low-voltage low-power continuous-time ΣΔ A/D converters

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2 Author(s)
Gerfers, F. ; Inst. of Microelectron., Saarlandes Univ., Saarbrucken, Germany ; Manoli, Y.

This paper presents a design strategy for low-voltage low-power ΣΔ analog-to-digital (A/D) converter using a continuous-time (CT) lowpass loop filter. An improved method is used to find the optimal ΣΔ modulator implementation with respect to a minimal power consumption on the one hand and to fulfil a rapid prototyping approach on the other hand. The influence of the low supply voltage as well as circuit nonidealities on the overall ΣΔ modulator is determined and verified by behavioral simulations. Transistor-level simulation results of a 1.5 V CT ΣΔ A/D converter show a 75 dB dynamic range in a bandwidth of 25 kHz

Published in:

Design, Automation and Test in Europe, 2001. Conference and Exhibition 2001. Proceedings

Date of Conference:

2001

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