Referenced Items are not available for this document.
We describe a low-voltage low-power CMOS nerve signal analog processing circuit for biomedical applications. It is dedicated to an implantable bladder controller. After amplifying the nerve signal with low-noise high-CMRR instrumentation amplifier, it is rectified and bin-integrated (RBI) with a low-power CMOS analog processing circuit. This circuit is based on switched capacitor technique. Using techniques to reduce operational amplifier requirements ensures low-power consumption. The circuit has been designed in CMOS 0.35 μm technology. The simulation results of the main parts of the proposed analog circuit are presented. At a supply voltage of 2.2 V the power dissipation is 700 μW
Published in:
Electronics, Circuits and Systems, 2000. ICECS 2000. The 7th IEEE International Conference on
(Volume:2
)
Date of Conference: 2000
- Page(s):
- 911 - 914 vol.2
- Meeting Date :
- 17 Dec 2000-20 Dec 2000
- Print ISBN:
- 0-7803-6542-9
- INSPEC Accession Number:
- 6944115
- Conference Location :
- Jounieh
- Digital Object Identifier :
- 10.1109/ICECS.2000.913024
- Product Type:
- Conference Publications
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