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Multi-gigahertz low-power low-skew rotary clock scheme

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4 Author(s)

On-chip clock frequencies in the gigaHertz range require generators with low skew and low jitter to avoid timing problems. This rotary clock distribution architecture provides low-skew low-jitter, gigaHertz-rate clocking with high edge rates and low power consumption, works over a wide power supply range and is completely scalable. The frequency is limited only by f/sub T/ of the integrated circuit technology used; an f/sub T/ of approximately 30 GHz produces square waves with 20 ps transition times. In addition, there is no limit to the size of the chip that can be clocked, and both multiphase and non-overlapping noise-immune differential clocking are supported.

Published in:

Solid-State Circuits Conference, 2001. Digest of Technical Papers. ISSCC. 2001 IEEE International

Date of Conference:

7-7 Feb. 2001