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A 50 GHz VCO in 0.25 /spl mu/m CMOS

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1 Author(s)
HongMo Wang ; Bell Labs., Murray Hill, NJ, USA

Integrated VCOs with fundamental frequencies in the millimeter-wave (MM-wave) bands have thus far been realized mainly in III-V technologies and the designs are mostly waveguide or transmission-line based. As CMOS technology progresses to deep submicron, however, the possibilities of integrating next-generation broadband communication transceivers of high bit-rate on a single chip using this low-cost technology are investigated. In so doing, one of the first questions is that whether a quality signal source or, more preferably, a VCO can be designed in such a technology. This work demonstrates the feasibility of an LC-resonator based VCO in 0.25 μm CMOS for operation at 50 GHz consuming less power than its counterparts in other technologies while providing comparable phase noise and tuning performance. The technology used for the design is a 0.25 μm (minimum L/sub eff/=0.24 μm) 1-poly-5-metal digital CMOS with a modified substrate, which consists of a l0 Ωcm bulk topped with a p/sup +/ buried layer for latch-up suppression and an epi, and a thickened top metal.

Published in:

Solid-State Circuits Conference, 2001. Digest of Technical Papers. ISSCC. 2001 IEEE International

Date of Conference:

7-7 Feb. 2001