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A 2.5 V 12 b 54 MSample/s 0.25 /spl mu/m CMOS ADC in 1 mm/sup 2/

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5 Author(s)
Van Der Ploeg, H. ; Philips Res. Lab., Eindhoven, Netherlands ; Hoogzaad, G. ; Termeer, H.A.H. ; Vertregt, M.
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Background digital offset extraction and analog compensation remove offset of the critical analog components. The calibrated two-step ADC achieves -70 dB THD in the Nyquist band with a 2.5 V supply. The ADC in 0.25 μm CMOS measures 1.0 mm/sup 2/ and dissipates 295 mW.

Published in:

Solid-State Circuits Conference, 2001. Digest of Technical Papers. ISSCC. 2001 IEEE International

Date of Conference:

7-7 Feb. 2001

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