By Topic

A low-voltage CMOS multiplier and its application to a 900 MHz RF downconversion mixer

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Debono, C.J. ; Dipt. di Elettronica, Pavia Univ., Italy ; Maloberti, F. ; Micallef, J.

A low-voltage, low-power analog multiplier operating at 1.2 V is presented. The multiplier is composed of a pair of voltage-to-current converters and a pair of voltage followers. The current produced is then added in resistors to produce the voltage output. The circuit multiplies the incoming 900 MHz RF signal with an 800 MHz local oscillator signal to produce a 100 MHz IF output. The circuit was designed using standard 0.35 μm CMOS technology. Simulation results indicate an input referred IP3 of 1 dBm and a spur free dynamic range of 44 dB

Published in:

Electronics, Circuits and Systems, 2000. ICECS 2000. The 7th IEEE International Conference on  (Volume:1 )

Date of Conference:

2000