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A low-voltage CMOS multiplier and its application to a 900 MHz RF downconversion mixer

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3 Author(s)
C. J. Debono ; Dipt. di Elettronica, Pavia Univ., Italy ; F. Maloberti ; J. Micallef

A low-voltage, low-power analog multiplier operating at 1.2 V is presented. The multiplier is composed of a pair of voltage-to-current converters and a pair of voltage followers. The current produced is then added in resistors to produce the voltage output. The circuit multiplies the incoming 900 MHz RF signal with an 800 MHz local oscillator signal to produce a 100 MHz IF output. The circuit was designed using standard 0.35 μm CMOS technology. Simulation results indicate an input referred IP3 of 1 dBm and a spur free dynamic range of 44 dB

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Electronics, Circuits and Systems, 2000. ICECS 2000. The 7th IEEE International Conference on  (Volume:1 )

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