By Topic

An SOI LDMOS/CMOS/BJT technology for integrated power amplifiers used in wireless transceiver applications

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Kumar, M. ; Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., China ; Tan, Y. ; Sin, J.K.O. ; Cai, J.

This paper describes a SOI LDMOS/CMOS/BJT technology that can be used in portable wireless communication applications. This technology allows the complete integration of the front-end circuits with the baseband circuits for low-cost/low-power/high-volume single-chip transceiver implementation. The LDMOS transistors (0.35 μm channel length, 3.8 μm drift length, 4.5 GHz fT and 21 V breakdown voltage), CMOS transistors (1.5 μm channel length, 0.8/-1.2 V threshold voltage), lateral NPN transistor (18 V BV/sub CBO/ and h/sub FE/ of 20), and high Q-factor (up to 6.1 at 900 MHz and 7.2 at 1.8 GHz) on-chip inductors are fabricated. A fully-functional high performance integrated power amplifier for 900 MHz wireless transceiver application is also demonstrated.

Published in:

Electron Device Letters, IEEE  (Volume:22 ,  Issue: 3 )