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An SOI LDMOS/CMOS/BJT technology for integrated power amplifiers used in wireless transceiver applications

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4 Author(s)
Kumar, M. ; Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., China ; Yue Tan ; Sin, J.K.O. ; Jun Cai

This paper describes a SOI LDMOS/CMOS/BJT technology that can be used in portable wireless communication applications. This technology allows the complete integration of the front-end circuits with the baseband circuits for low-cost/low-power/high-volume single-chip transceiver implementation. The LDMOS transistors (0.35 /spl mu/m channel length, 3.8 /spl mu/m drift length, 4.5 GHz f/sub T/ and 21 V breakdown voltage), CMOS transistors (1.5 /spl mu/m channel length, 0.8/-1.2 V threshold voltage), lateral NPN transistor (18 V BV/sub CBO/ and h/sub FE/ of 20), and high Q-factor (up to 6.1 at 900 MHz and 7.2 at 1.8 GHz) on-chip inductors are fabricated. A fully-functional high performance integrated power amplifier for 900 MHz wireless transceiver application is also demonstrated.

Published in:

Electron Device Letters, IEEE  (Volume:22 ,  Issue: 3 )

Date of Publication:

March 2001

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