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Modeling, analysis, and design of RF LDMOS devices using harmonic-balance device simulation

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4 Author(s)
Rotella, F.M. ; Dept. of Electr. Eng., Stanford Univ., CA, USA ; Ma, G. ; Yu, Z. ; Dutton, R.W.

This paper describes how device simulation may be used for the modeling, analysis, and design of radio-frequency (RF) laterally diffused metal-oxide-semiconductor (LDMOS) transistors. Improvements to device analysis needed to meet the requirements of RF devices are discussed. Key modeling regions of the LDMOS device are explored and important physical effects are characterized. The LDMOS model is compared to dc and small-signal ac measurements for calibration purposes. Using the calibrated model, large-signal accuracy is verified using harmonic distortion simulation, and intermodulation analysis. Predictive analysis and a study of the structure's parasitic components are also presented. Load-pull simulation is used to analyze matching network effects to determine the best choices for device impedance matching

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Microwave Theory and Techniques, IEEE Transactions on  (Volume:48 ,  Issue: 6 )